`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date:    13:23:48 11/08/2008 
// Design Name: 
// Module Name:    extension 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module extension(
    input [7:0] eightbitImmediate,
    input zeroExtend,
	 input LUIEnable,
    output reg [15:0] extendedImmediate
    );
	always@(*)
	begin
	if(LUIEnable)
		begin
			extendedImmediate[15:8] = eightbitImmediate[7:0];
			extendedImmediate[7:0] = 8'b00000000;
	end
	else if(zeroExtend)
		begin
			extendedImmediate [15:8] = 8'b00000000;
			extendedImmediate [7:0] = eightbitImmediate[7:0];
		end
	else
		begin
			if(eightbitImmediate[7])
				extendedImmediate [15:8] = 8'b11111111;
			else
				extendedImmediate [15:8] = 8'b00000000;
			extendedImmediate [7:0] = eightbitImmediate[7:0];
		end

end
endmodule
